The problem that I have been running into is that the HDL coder and DSP builder-generated custom components seem to follow different conventions for mapping their data signals to connection points in Qsys i.e. I intend to connect several data signals between the HDL coder custom component and the DSP Builder custom component in Qsys.
#Nco dsp builder manual#
I have been using page 66 of this DSPBA manual as a reference guide for importing DSPBuilder-generated custom components into Qsys/Platform designer. I import both of these IP cores as custom components in an existing Qsys/platform designer project for my board (DE10-Nano).
I also use DSP Builder to generate an IP core specializing in NCO/Mixer/Filter components, also containing ports for external data signals. In my system, I use MATLAB HDL coder to generate an IP core facilitating host to target communication with an AXI bus, and a set of external data signals each mapped to their own distinct individual connection points i.e.
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